Flipper Zero Firmware
Loading...
Searching...
No Matches
cc1101_regs.h
1#pragma once
2
3#include <stdbool.h>
4#include <stdint.h>
5
6#ifdef __cplusplus
7extern "C" {
8#endif
9
10/* Frequency Synthesizer constants */
11#define CC1101_QUARTZ 26000000
12#define CC1101_FMASK 0xFFFFFF
13#define CC1101_FDIV 0x10000
14#define CC1101_IFDIV 0x400
15
16/* IO Bus constants */
17#define CC1101_TIMEOUT 250
18
19/* Bits and pieces */
20#define CC1101_READ (1 << 7)
21#define CC1101_BURST (1 << 6)
23/* Common registers, CC1101_BURST and CC1101_WRITE behaves as expected */
24#define CC1101_IOCFG2 0x00
25#define CC1101_IOCFG1 0x01
26#define CC1101_IOCFG0 0x02
27#define CC1101_FIFOTHR 0x03
28#define CC1101_SYNC1 0x04
29#define CC1101_SYNC0 0x05
30#define CC1101_PKTLEN 0x06
31#define CC1101_PKTCTRL1 0x07
32#define CC1101_PKTCTRL0 0x08
33#define CC1101_ADDR 0x09
34#define CC1101_CHANNR 0x0A
35#define CC1101_FSCTRL1 0x0B
36#define CC1101_FSCTRL0 0x0C
37#define CC1101_FREQ2 0x0D
38#define CC1101_FREQ1 0x0E
39#define CC1101_FREQ0 0x0F
40#define CC1101_MDMCFG4 0x10
41#define CC1101_MDMCFG3 0x11
42#define CC1101_MDMCFG2 0x12
43#define CC1101_MDMCFG1 0x13
44#define CC1101_MDMCFG0 0x14
45#define CC1101_DEVIATN 0x15
46#define CC1101_MCSM2 0x16
47#define CC1101_MCSM1 0x17
48#define CC1101_MCSM0 0x18
49#define CC1101_FOCCFG 0x19
50#define CC1101_BSCFG 0x1A
51#define CC1101_AGCCTRL2 0x1B
52#define CC1101_AGCCTRL1 0x1C
53#define CC1101_AGCCTRL0 0x1D
54#define CC1101_WOREVT1 0x1E
55#define CC1101_WOREVT0 0x1F
56#define CC1101_WORCTRL 0x20
57#define CC1101_FREND1 0x21
58#define CC1101_FREND0 0x22
59#define CC1101_FSCAL3 0x23
60#define CC1101_FSCAL2 0x24
61#define CC1101_FSCAL1 0x25
62#define CC1101_FSCAL0 0x26
63#define CC1101_RCCTRL1 0x27
64#define CC1101_RCCTRL0 0x28
65#define CC1101_FSTEST 0x29
66#define CC1101_PTEST 0x2A
67#define CC1101_AGCTEST 0x2B
68#define CC1101_TEST2 0x2C
69#define CC1101_TEST1 0x2D
70#define CC1101_TEST0 0x2E
72/* Strobe registers, CC1101_BURST is not available, CC1101_WRITE ignored */
73#define CC1101_STROBE_SRES 0x30
74#define CC1101_STROBE_SFSTXON \
75 0x31
76#define CC1101_STROBE_SXOFF 0x32
77#define CC1101_STROBE_SCAL \
78 0x33
79#define CC1101_STROBE_SRX \
80 0x34
81#define CC1101_STROBE_STX \
82 0x35
83#define CC1101_STROBE_SIDLE \
84 0x36
85#define CC1101_STROBE_SWOR \
86 0x38
87/* 0x37 is unused */
88#define CC1101_STROBE_SPWD 0x39
89#define CC1101_STROBE_SFRX \
90 0x3A
91#define CC1101_STROBE_SFTX \
92 0x3B
93#define CC1101_STROBE_SWORRST 0x3C
94#define CC1101_STROBE_SNOP \
95 0x3D
97/* Status registers, must be accessed with CC1101_BURST, but one by one */
98#define CC1101_STATUS_PARTNUM 0x30
99#define CC1101_STATUS_VERSION 0x31
100#define CC1101_STATUS_FREQEST 0x32
101#define CC1101_STATUS_LQI 0x33
102#define CC1101_STATUS_RSSI 0x34
103#define CC1101_STATUS_MARCSTATE 0x35
104#define CC1101_STATUS_WORTIME1 0x36
105#define CC1101_STATUS_WORTIME0 0x37
106#define CC1101_STATUS_PKTSTATUS 0x38
107#define CC1101_STATUS_VCO_VC_DAC 0x39
108#define CC1101_STATUS_TXBYTES \
109 0x3A
110#define CC1101_STATUS_RXBYTES \
111 0x3B
112#define CC1101_STATUS_RCCTRL1_STATUS 0x3C
113#define CC1101_STATUS_RCCTRL0_STATUS 0x3D
115/* Some special registers, use CC1101_BURST to read/write data */
116#define CC1101_PATABLE \
117 0x3E
118#define CC1101_FIFO \
119 0x3F
120#define CC1101_IOCFG_INV (1 << 6)
122typedef enum {
123 CC1101IocfgRxFifoThreshold = 0x00,
124 CC1101IocfgRxFifoThresholdOrPacket = 0x01,
125 CC1101IocfgTxFifoThreshold = 0x02,
126 CC1101IocfgTxFifoFull = 0x03,
127 CC1101IocfgRxOverflow = 0x04,
128 CC1101IocfgTxUnderflow = 0x05,
129 CC1101IocfgSyncWord = 0x06,
130 CC1101IocfgPacket = 0x07,
131 CC1101IocfgPreamble = 0x08,
132 CC1101IocfgClearChannel = 0x09,
133 CC1101IocfgLockDetector = 0x0A,
134 CC1101IocfgSerialClock = 0x0B,
135 CC1101IocfgSerialSynchronousDataOutput = 0x0C,
136 CC1101IocfgSerialDataOutput = 0x0D,
137 CC1101IocfgCarrierSense = 0x0E,
138 CC1101IocfgCrcOk = 0x0F,
139 /* Reserved range: 0x10 - 0x15 */
140 CC1101IocfgRxHardData1 = 0x16,
141 CC1101IocfgRxHardData0 = 0x17,
142 /* Reserved range: 0x18 - 0x1A */
143 CC1101IocfgPaPd = 0x1B,
144 CC1101IocfgLnaPd = 0x1C,
145 CC1101IocfgRxSymbolTick = 0x1D,
146 /* Reserved range: 0x1E - 0x23 */
147 CC1101IocfgWorEvnt0 = 0x24,
148 CC1101IocfgWorEvnt1 = 0x25,
149 CC1101IocfgClk256 = 0x26,
150 CC1101IocfgClk32k = 0x27,
151 /* Reserved: 0x28 */
152 CC1101IocfgChpRdyN = 0x29,
153 /* Reserved: 0x2A */
154 CC1101IocfgXoscStable = 0x2B,
155 /* Reserved range: 0x2C - 0x2D */
156 CC1101IocfgHighImpedance = 0x2E,
157 CC1101IocfgHW = 0x2F,
158 /* Only one CC1101IocfgClkXoscN can be selected as an output at any time */
159 CC1101IocfgClkXosc1 = 0x30,
160 CC1101IocfgClkXosc1_5 = 0x31,
161 CC1101IocfgClkXosc2 = 0x32,
162 CC1101IocfgClkXosc3 = 0x33,
163 CC1101IocfgClkXosc4 = 0x34,
164 CC1101IocfgClkXosc6 = 0x35,
165 CC1101IocfgClkXosc8 = 0x36,
166 CC1101IocfgClkXosc12 = 0x37,
167 CC1101IocfgClkXosc16 = 0x38,
168 CC1101IocfgClkXosc24 = 0x39,
169 CC1101IocfgClkXosc32 = 0x3A,
170 CC1101IocfgClkXosc48 = 0x3B,
171 CC1101IocfgClkXosc64 = 0x3C,
172 CC1101IocfgClkXosc96 = 0x3D,
173 CC1101IocfgClkXosc128 = 0x3E,
174 CC1101IocfgClkXosc192 = 0x3F,
175} CC1101Iocfg;
176
177typedef enum {
178 CC1101StateIDLE = 0b000,
179 CC1101StateRX = 0b001,
180 CC1101StateTX = 0b010,
181 CC1101StateFSTXON = 0b011,
182 CC1101StateCALIBRATE = 0b100,
183 CC1101StateSETTLING = 0b101,
184 CC1101StateRXFIFO_OVERFLOW =
185 0b110,
186 CC1101StateTXFIFO_UNDERFLOW = 0b111,
187} CC1101State;
188
189typedef struct {
190 uint8_t FIFO_BYTES_AVAILABLE : 4;
191 CC1101State STATE : 3;
192 bool CHIP_RDYn : 1;
194
195typedef union {
196 CC1101Status status;
197 uint8_t status_raw;
199
200typedef struct {
201 uint8_t NUM_TXBYTES : 7;
202 bool TXFIFO_UNDERFLOW : 1;
204
205typedef struct {
206 uint8_t NUM_RXBYTES : 7;
207 bool RXFIFO_OVERFLOW : 1;
209
210#ifdef __cplusplus
211}
212#endif
Definition cc1101_regs.h:205
Definition cc1101_regs.h:189
Definition cc1101_regs.h:200
Definition cc1101_regs.h:195