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3#include <ble/core/ble_defs.h>
5#define CFG_TX_POWER (0x19)
7#define CFG_IDENTITY_ADDRESS GAP_PUBLIC_ADDR
12#define CFG_ENCRYPTION_KEY_SIZE_MAX (16)
13#define CFG_ENCRYPTION_KEY_SIZE_MIN (8)
18#define CFG_IO_CAPABILITY IO_CAP_DISPLAY_YES_NO
23#define CFG_SC_SUPPORT SC_PAIRING_OPTIONAL
28#define ALL_PHYS_PREFERENCE 0x00
29#define RX_2M_PREFERRED 0x02
30#define TX_2M_PREFERRED 0x02
43#define CFG_BLE_NUM_LINK 2
49#define CFG_BLE_NUM_GATT_SERVICES 8
58#define CFG_BLE_NUM_GATT_ATTRIBUTES 68
63#define CFG_BLE_MAX_ATT_MTU (256 + 128 + 16 + 8 + 4 + 2)
75#define CFG_BLE_ATT_VALUE_ARRAY_SIZE (1344)
80#define CFG_BLE_PREPARE_WRITE_LIST_SIZE BLE_PREP_WRITE_X_ATT(CFG_BLE_MAX_ATT_MTU)
85#define CFG_BLE_MBLOCK_COUNT \
86 (BLE_MBLOCKS_CALC(CFG_BLE_PREPARE_WRITE_LIST_SIZE, CFG_BLE_MAX_ATT_MTU, CFG_BLE_NUM_LINK))
91#define CFG_BLE_DATA_LENGTH_EXTENSION 1
96#define CFG_BLE_SLAVE_SCA 500
109#define CFG_BLE_MASTER_SCA 0
116#define CFG_BLE_LSE_SOURCE \
117 SHCI_C2_BLE_INIT_CFG_BLE_LS_CLK_LSE | SHCI_C2_BLE_INIT_CFG_BLE_LS_OTHER_DEV | \
118 SHCI_C2_BLE_INIT_CFG_BLE_LS_CALIB
123#define CFG_BLE_HSE_STARTUP_TIME 0x148
128#define CFG_BLE_MAX_CONN_EVENT_LENGTH (0xFFFFFFFF)
135#define CFG_BLE_VITERBI_MODE 1
166#define CFG_BLE_OPTIONS \
167 (SHCI_C2_BLE_INIT_OPTIONS_LL_HOST | SHCI_C2_BLE_INIT_OPTIONS_WITH_SVC_CHANGE_DESC | \
168 SHCI_C2_BLE_INIT_OPTIONS_DEVICE_NAME_RO | SHCI_C2_BLE_INIT_OPTIONS_EXT_ADV | \
169 SHCI_C2_BLE_INIT_OPTIONS_CS_ALGO2 | SHCI_C2_BLE_INIT_OPTIONS_POWER_CLASS_2_3)
184#define CFG_TLBLE_EVT_QUEUE_LENGTH 5
193#define CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE \
196#define TL_BLE_EVENT_FRAME_SIZE (TL_EVT_HDR_SIZE + CFG_TLBLE_MOST_EVENT_PAYLOAD_SIZE)
199#define CFG_DEBUG_TRACE_FULL 0
200#define CFG_DEBUG_TRACE_LIGHT 0